1. Field of the Invention
The present invention relates to output circuits. In particular, the present invention relates to output circuits having bipolar pull up and pulldown transistors for propagating logic signals between integrated circuits. More particularly, the present invention relates to such output circuits having variable base drive suitable to operate the bipolar transistors under low power supply conditions.
2. Description of the Prior Art
Output circuits are used to transfer electrical signals between coupled circuits. This may be achieved in a variety of well-known ways. In the field of semiconductor devices, integrated output circuits are established by coupling together active devices that may be controlled to define the potential propagated by such circuits. It is well known that in digital systems the signals moving between devices are categorized as either logic level HIGH (or "1" or "ON") and logic level LOW (or "0" or "OFF"). The particular signal potential that defines whether a HIGH or a LOW signal is transmitted is dependent upon the semiconductor components that form the circuitry associated with that transmission. The most common circuit configurations used to produce digital signals include, among others, CMOS, Transistor-Transistor Logic (TTL), and Emitter-Coupled Logic (ECL). Each of these logic configurations operates differently as a function of the "swing" between what constitutes a HIGH signal and what constitutes a LOW signal.
For CMOS logic, which is based primarily on the use of Metal-Oxide-Semiconductor (MOS) transistors, a LOW signal is generally developed in the range of 0.6 volts (V) above a low-potential power rail GND, which may be at 0.0V. A HIGH signal is generally developed in the range of Vcc to Vcc-0.6V, where Vcc may vary between 3.0V and 3.6V for a nominal 3.3-volt supply and between 1.9V and 2.5V for a nominal 2.2-volt supply. For a 2.2-volt supply then, the differential swing between LOW and HIGH must be at least 1.3 volts in order to ensure that a desired shift between LOW and HIGH will occur.
TTL, ECL, and other logic configurations, on the other hand, are based primarily on the use of bipolar transistors. The differential swing for a shift between a LOW and a HIGH is significantly less than it is for CMOS operation--it may be as low as 0.5V. For Positive ECL systems, for example, the swings are even closer. In PECL circuitry, which is Vcc dependent, a HIGH is equivalent to a potential of about Vcc-0.9V, and a LOW is equivalent to a potential of about Vcc-1.7V. Thus, in mating CMOS and non-CMOS transmissions, it can be seen that variations in potential swings will not automatically ensure the triggering of a desired swing from one logic level to another, particularly as available supply potentials are reduced. Further, it is to be noted that bipolar transistors, unlike MOS transistors, require sufficient base drive to ensure their operation.
As transistors become increasingly smaller in order to achieve the faster transmission rates of interest and lower power consumption, the corresponding differential swings associated with their logic outputs are reduced. Unfortunately, circuits that in the past had available sufficient power and logic swing ranges to operate as required, may have difficulty performing as expected as power and logic ranges are reduced. This is of particular concern when using bipolar transistors, which transistors consume more power than MOS transistors but which tend to operate more quickly.
Output circuits typically employ a pull up transistor for propagating logic HIGH signals associated with the Vcc potential, and pulldown transistors for propagating logic LOW signals, again associated with the Vcc potential. For bipolar transistor based output circuits, it is desirable to minimize their power consumption by operating them as a function of the loading applied to the output circuit. In particular, if the load at the circuit output node, which may be coupled to a bus, increases, it is preferable to be able to increase the base drive to the bipolar transistor in order to ensure that the output signal remains the same. Alternatively, when the load at the output is reduced, it is desirable to reduce the base drive, thereby saving power. This may be achieved with a feedback loop coupled to the output node to sense load changes and produce a changed base drive to the bipolar output transistor.
An existing output circuit mixing MOS and bipolar devices for the purpose of enabling variable bipolar output transistor base drive is shown in FIG. 1. The prior variable base drive output circuit includes first regulating PMOS transistor M1 activated by an enable signal at its gate provided through enable node EN. Current regulating resistor R1 supplies, when M1 is on, current I.sub.c, through always-on NMOS transistor M2 to the collector of pull down bipolar transistor Q1. The operation of M2 is maintained stable by control through a stable reference source Vref that is not subject to the range of swings that may be experienced by high-potential supply rail Vcc. When the logic signal to be propagated to the output node OUT of the output circuit is LOW, Q1 must be operative. That occurs when the incoming signal at node DATA is a logic HIGH in the circuit of FIG. 1.
The current I.sub.c through Q1 is defined by the characteristics of that pull down transistor as well as the base drive current I.sub.b applied to the base of Q1. The base drive current I.sub.b is defined by a base-drive-controlling branch that includes pass through NMOS transistors M4 and M5 and feedback transistor M3. When the load on the output node OUT of the output transistor is reduced, the current through current-limiting resistor R1 increases and the current through base-drive-controlling branch decreases. As a result, the base drive current I.sub.b applied to the base of Q1 decreases. Conversely, a greater load at OUT causes an increase in the current through the branch including feedback transistor M3 so as to increase the base drive to Q1. This arrangement minimizes current loss by minimizing I.sub.c during logic LOW outputs and varied loads at OUT.
The variable base drive output circuit of FIG. 1 works well for Vcc of about 2.7V or above. However, because there are vagaries associated with the fabrication of the active devices of the output circuit of FIG. 1, it is necessary to size those devices and couple them in a manner that ensures the worst fabrication variability possibilities will not cause failure of the circuit. As a result, for power supplies at potentials less than 2.7V, the output circuit of FIG. 1 fails to provide satisfactory signal propagation with minimal power consumption. In particular, the potential drops across M3 (V.sub.t), M4 and M5 (2V.sub.DS), and Q1 (V.sub.BE), when added up, limit the current to be supplied to the base of Q1 such that it cannot be operated under all conditions. For that reason, at low supply potentials, the output circuit of FIG. 1 fails to operate.
Therefore, what is needed is an output circuit having the capability to supply variable base drive to the pull down bipolar transistor thereof. What is also needed is such a variable base drive output circuit that is operational with low power supply potentials.